HT32F1251/51B/52/53 -- 32-bit ARM Cortex™-M3 MCU

General Description

The Holtek HT32F125x series of devices are high performance, low power consumption 32-bit microcontrollers based on the ARM Cortex™-M3 processor core. The Cortex™-M3 is a next-generation processor core which is tightly coupled with a Nested Vectored Interrupt Controller (NVIC), SysTick timer and advanced debug support.

The HT32F125x device operates at a frequency of up to 72 MHz with a Flash accelerator to obtain maximum efficiency. It provides up to 32 KB of embedded Flash memory for code/data storage and up to 8 KB of embedded SRAM memory for system operation and application program usage. A variety of peripherals, such as ADC, I2C, USART, SPI, SW-DP (Serial Wire Debug Port), etc., are also implemented in this device series. Several power saving modes provide the flexibility for maximum optimisation between wakeup latency and power consumption, an especially important consideration in low power applications.

The above features make the HT32F125x device suitable for a wide range of applications, especially in areas such as white goods and application control, power monitor and alarm systems, consumer and handheld equipment, data logging applications and so on.



  • 32-bit ARM Cortex™-M3 processor core
  • Up to 72 MHz operation frequency
  • 1.25 DMIPS/MHz (Dhrystone 2.1)
  • Single-cycle multiplication and hardware division
  • Integrated Nested Vectored Interrupt Controller (NVIC)
  • 24-bit SysTick timer
  • Internal Bus Matrix connected with ICode bus, DCode bus, System bus, Private Peripheral Bus (PPB) and debug accesses (AHB-AP)
  • Nested Vectored Interrupt Controller (NVIC)
  • Flash Patch and Breakpoint (FPB)
  • Data Watchpoint and Trace (DWT)
  • Instrument Trace Macrocell (ITM)
  • Memory Protection Unit (MPU)
  • Serial Wire Debug Port (SW-DP)
  • Embedded Trace Macrocell (ETM)
  • Trace Port Interface Unit (TPIU)

On-chip Memory

  • 9 to 32 KB on-chip Flash memory for instruction/data and option storage
  • 2 to 8 KB on-chip SRAM
  • Supports several boot modes

Flash Memory Controller

  • Flash accelerator for maximum efficiency
  • 32-bit word programming (ISP and IAP)
  • Flash protection capability to prevent illegal access

Reset Control Unit

  • Power On Reset (POR)
  • Brown Out Detector (BOD)
  • Programmable Low Voltage Detector (LVD)

Clock Control Unit

  • External 4 to 16 MHz crystal oscillator
  • External 32,768 Hz crystal oscillator
  • Internal 8MHz RC oscillator trimmed to 1% accuracy at 3.3V operating voltage and 25C
    operating temperature
  • Internal 32 kHz RC oscillator
  • Integrated system clock PLL
  • Independent clock gating bits for peripheral clock sources

Power Management

  • Single 3.3 V power supply: 2.7 V to 3.6 V
  • Integrated 1.8 V LDO regulator for core and peripheral power supply
  • VBAT battery power supply for RTC and backup registers
  • Three power domains: 3.3V, 1.8V and Backup
  • Four power saving modes: Sleep, Deep-Sleep1, Deep-Sleep2, Power-Down

Analog to Digital Converter

  • 12-bit SAR ADC engine
  • Up to 1 Msps conversion rate - 1 μs at 56 MHz, 1.17 μs at 72 MHz
  • 8 external analog input channels
  • Supply voltage range: 2.7 V ~ 3.6 V
  • Conversion range: VSSA ~ VDDA

Analog Operational Amplifier/Comparator

  • 2 Operational Amplifiers or 2 Comparator functions which are software configurable
  • Supply voltage range: 2.7 V ~ 3.6 V

I/O Ports

  • Up to 32 GPIOs
  • Port A and Port B are mapped as 16 external interrupts (EXTI)
  • Almost all I/O pins are 5 V-tolerant except for pins shared with analog inputs

PWM Generation and Capture Timers

  • Two 16-bit General-Purpose Timers (GPTM)
  • Up to 4CHs PWM compare output or input capture for each GPTM
  • External trigger input

Watchdog Timer

  • 12-bit down counter with 3-bit prescaler
  • Interrupt or reset event for the system
  • Programmable watchdog timer window function
  • Write protection function

Real Time Clock

  • 32-bit up-counter with a programmable prescaler
  • Alarm function
  • Interrupt and Wake-up event

Inter-integrated Circuit (I2C)

  • Support both master and slave mode with a frequency of up to 400 kHz
  • Provide arbitration function
  • Supports 7-bit and 10-bit addressing mode and general call addressing

Serial Peripheral Interface (SPI)

  • SPI interfaces with a frequency of up to 18 MHz
  • Support both master and slave mode
  • FIFO Depth: 8 levels
  • Multi-master and multi-slave operation

Universal Synchronous Asynchronous Receiver Transmitter (USART)

  • Operating frequency: up to 4.5 MHz
  • Supports both asynchronous and clocked synchronous serial communication modes
  • IrDA SIR encoder and decoder
  • RS485 mode with output enable control
  • Full Modem function
  • FIFO Depth: 16 x 9 bits for both receiver and transmitter

Debug Support

  • Serial Wire Debug Port - SW-DP
  • 6 instruction comparators and 2 literal comparators for hardware breakpoint or code / literal patch
  • 4 comparators for hardware watchpoint
  • 1-bit asynchronous trace - TRACESWO

Package and Operation Temperature

  • 48-pin LQFP package
  • Operation temperature range: -40C to +85C

Technical Document

Other Information